Ever since the integrated circuit was first introduced several decades ago, there has been a continuing effort in the related fields of semiconductor processing and integrated circuit design to scale device sizes downward. Of course, the purpose of this effort has been to increase total circuit density. Today, the density of components in very large scale integrated circuits (VLSI) is so enormous that further scaling of circuit components is constrained in part by thermal considerations. In other words, heat dissipation and removal have now become an important physical problem which influences the performance and design of most modern computer systems.
By way of example, the heat generated by a single high-speed emitter-coupled-logic gate (ECL) is typically on the order of a few milliwatts. Other logic families such as complementary metal-oxide semiconductor (CMOS) logic dissipate energy at reduced levels. Unfortunately, when hundreds of thousands of these logic gates are fabricated together on a single integrated circuit the total power consumption can easily reach the kilowatt level, especially if high-performance logic gates are used.
Even if a low-power logic family is used, a complete digital computer system may include tens of millions of transistors fabricated on hundreds of individual semiconductor chips. Because these chips are often packed closely together to minimize signal propagation delay, it is not uncommon for a computer system to generate tens or hundreds of kilowatts. At these power levels the operating temperature of the integrated circuits themselves can rise well above 120 degrees Celsius; such temperatures can cause serious reliability problems. Consequently, the use of various devices such as heat sinks, fans, special materials, etc., is necessary to alleviate the heat dissipation problem.
Addressing this problem, U.S. Pat. Nos. 4,450,472, 4,573,067 of Tuckerman et al., and 4,567,505 of Pease et al., each describe a heat sink in which microscopic heat fins are formed into the backside of a semiconductor substrate. The top surface of the substrate houses an integrated circuit. According to Tuckerman, the heat fins are fabricated integrally -- into the semiconductor die itself--employing such techniques as chemical etching, laser scribing, reactive ion etching, electro-plating, or ultra fine sawing of the backside of the silicon die. Water is then pumped through these slots to provide a laminar flow which cools the die.
Theoretically, Tuckerman's approach does provide a means for efficiently removing heat from an integrated circuit. However, from a practical standpoint, his method suffers from a number of very significant drawbacks. Foremost among these is the fact that it is highly infeasible to form microscopic thin channels or slots (of the type required by Tuckerman) into the backside of a semiconductor material. Sawing thin slots into a weak, brittle, and hard material such as silicon often results in breakage and other irregularities. In addition, relying on integrally formed slots limits the height of the cooling channels to roughly the thickness of the silicon wafer. To overcome this latter limitation, high pressure is needed to force the coolant through the slots at a sufficiently high coolant flow rate so as to provide acceptable heat removal.
Moreover, it should be noted that the fabrication of precise microscopic (on the order of 50 microns wide or less) fins with high enough aspect ratios (depth versus width) is a difficult and complex process to carry out. A further problem arises out of the fact that engaging the semiconductor substrate with a hydrated coolant invariably subjects the silicon die to unwanted contaminants and impurities. Contamination of the substrate may ultimately compromise the reliability of the Integrated circuit.
Therefore, what is needed is an heat exchanger which is more practical, less costly, and involves less complex manufacturing steps than the prior art approach described above. The heat exchanger should be capable of satisfying the heat removal requirements of high-speed switching circuitry in a simple, cost-effective manner--without jeopardizing the integrity of the device.